Memories are seeing widespread use in recent years. However, memories may be damaged by multiple times of erasing and writing data, resulting in an increased probability of error and a significantly reduced reliability of the non-volatile memory. Therefore, it is necessary to improve the reliability of the non-volatile memory by supplying design techniques such as error correction techniques, such that a lifetime of a product can be prolonged and an operation state of the product can be more stable.
An error correction module for correcting error data read by the non-volatile memory is disposed in a control circuit of the memory to eliminate error caused by external factors in the non-volatile memory, thereby prolonging the lifetime of the non-volatile memory. A common error correction coding technology, such as a Bose-Chaudhuri-Hocquenghem (BCH) coding technology, is capable of fast computation and has a correction capability that increases with the increase of the number of redundant bits. However, the BCH coding technology cannot keep up with the manufacturing technologies of the non-volatile memory which have been greatly improved and cannot provide sufficient correction capability. Therefore, a Low Density Parity Code (LDPC) error correction technology widely used in the field of communication and having a strong correction capability is now being used in data storage.